1. Field of the Invention
The present invention generally relates to accessing data in a multiple processor system. More specifically, the present invention provides techniques for improving lock mechanisms for maintaining cache coherency in a multiple processor system having a multiple-cluster architecture.
2. Description of Related Art
Performance limitations in a conventional computer system using a bus architecture have led to the development of a point-to-point architecture for connecting processors in a system with a single memory space. In one example, individual processors can be directly connected to each other through a plurality of point-to-point links to form a cluster of processors. Separate clusters of processors can also be connected. The point-to-point links significantly increase the bandwidth for coprocessing and multiprocessing functions.
However, using a point-to-point architecture to connect multiple processors in a multiple-cluster system sharing a single memory space presents various problems. Some of these problems arise in the context of coordinating processes in which multiple nodes are working on a common task and/or are seeking to access common data words. However, locking mechanisms for point-to-point architectures are limited. Consequently, it is desirable to provide techniques for improving lock mechanisms for cache coherency in systems having multiple clusters of multiple processors connected using point-to-point links.